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Visar resultat 1 - 5 av 12 uppsatser som matchar ovanstående sökkriterier.

1. 1. A Low Noise Digitally Controlled Oscillator for a Wi-Fi 6 All-Digital PLL

   Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Författare :Tommy Lundberg; [2023]
   Nyckelord :Digitally Controlled Oscillator; All-Digital Phase Locked Loop; Oscillator; Low Phase Noise; Class-C oscillator; Dual-Core; Dynamic BiasingCircuit; Digitalt Styrd Oscillator; Digital PLL; Lågt Fasbrus; Klass-C Oscillator; Dubbelkärnig; Dynamisk Bias-Krets;

   Sammanfattning : Following the rise of Internet of Things (IoT), or just the technological advancements and expectations in a world where the things are or will be connected, new demands are put on Integrated Circuit (IC) for wireless connectivity. The use cases seem endless; smart home, healthcare, entertainment, and science are all areas that can benefit from connectivity of low power electronics. LÄS MER

3. 2. A digital integer-N PLL architecture using a pulse-shrinking TDC for mmWave applications.

   Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Författare :Simon Richter; [2023]
   Nyckelord :Phase-locked-loops; All-digital Phase-locked-loops; Time-to-digital converters; 5G and beyond; Radio-frequency design; Fas-låsd-loop; Helt-digital fas-låst-loop; Tid-till-digital-omvandlare; 5G och framtiden; Radio-frekvens design;

   Sammanfattning : With the move of the broadband cellular network towards 5G taking off and the preparatory work on 6G and beyond starting, the need for low-complexity, low-power, and high-performance frequency synthesis using Phase-Locked Loop (PLL)s increases. As we get deeper into the mm-wave frequencies and push towards frequencies in the order of 50-70 GHz design challenges with existing PLL architectures, such as limited technology scaling and limited in-band noise performance become more apparent. LÄS MER

4. 3. System Level Modeling and Verification of All-digital Phase-locked Loop

   Kandidat-uppsats, KTH/Skolan för informations- och kommunikationsteknik (ICT)

   Författare :Chi Zhang; [2015]
   Nyckelord :;

   Sammanfattning : In wirelesscommunication systems, a local oscillator (LO) aims at demodulating radio-frequency signals into baseband signals. The performance of these signals determines the quality of communications which is highly affected by the phase accuracy of local oscillators. LÄS MER

5. 4. Design and Simulation of Miscellaneous Blocks of an All-Digital PLL for the 60 GHz Band

   Master-uppsats, Elektroniksystem; Tekniska högskolan

   Författare :Hadiyah Butt; Manjularani Padala; [2013]
   Nyckelord :ADPLL; PLL; DCO; TDC;

   Sammanfattning : A phase-locked loop commonly known as PLL is widely used in communication systems. A PLL is used in radio, telecommunications, modulation and demodulation. It can be used for clock generation, clock recovery from data signals, clock distribution and as a frequency synthesizer. Most electronic circuits encounter the problem of the clock skew. LÄS MER

7. 5. Design of a Time-to-Digital Converter for an All-Digital Phase Locked Loop for the 2-GHz Band

   Master-uppsats, Linköpings universitet/Elektroniksystem; Linköpings universitet/Tekniska högskolan

   Författare :Naveen Wali; Balamurali Radhakrishnan; [2013]
   Nyckelord :ADPLL; TDC; DPLL; PLL;

   Sammanfattning : An all-digital phase locked loop for WiGig systems was implemented. The developedall-digital phase locked loop has a targeted frequency range of 2.1-GHz to2.5-GHz. LÄS MER