Sökning: "Cache coherence"

Visar resultat 1 - 5 av 6 uppsatser innehållade orden Cache coherence.

  1. 1. Exploring Selective coherence as a Solution to Self-invalidation in ArgoDSM

    Uppsats för yrkesexamina på avancerad nivå, Uppsala universitet/Datorteknik

    Författare :Christopher Edberg; [2022]
    Nyckelord :ArgoDSM; Coherence; Performance; Selective Coherence; Distributed Shared Memory; Software-based Distributed Shared Memory; DSM; Software DSM; Computer Architecture; Parallel Computing;

    Sammanfattning : Maintaining coherency in a distributed system can prove challenging, this is especially true for distributed shared memory systems. The problem with remote synchronization in the distributed shared memory software ArgoDSM occurs when a lock operation has to cross the boundaries of a node, this causes a large number of self-invalidations (SI) or self-downgrades (SD) which is costly. LÄS MER

  3. 2. Two-phase WCET analysis for cache-based symmetric multiprocessor systems

    Master-uppsats, KTH/Skolan för informations- och kommunikationsteknik (ICT)

    Författare :Rodothea Myrsini Tsoupidi; [2017]
    Nyckelord :Worst-Case Execution Time Analysis; Abstract Domain; Real-Time Systems; Low-level Analysis; Pipeline Analysis; Cache-based Analysis; Multiprocessor Analysis; Längsta Exekveringstid Analys; WCET; Abstrakt Domän; Realtidsystem; Låg-nivå Analys; Pipeline Analys; Cachebaserad Analys;

    Sammanfattning : The estimation of the worst-case execution time (WCET) of a task is a problem that concerns the field of embedded systems and, especially, real-time systems. Estimating a safe WCET for single-core architectures without speculative mechanisms is a challenging task and an active research topic. LÄS MER

  4. 3. Investigating the Scalability of Direct-to-Master Caches

    Master-uppsats, Uppsala universitet/Institutionen för informationsteknologi

    Författare :Tim Weidner; [2017]
    Nyckelord :;

    Sammanfattning : Upcoming processors will utilize an ever increasing number of transistors bye mploying them as multiple cores. With the growth in number of cores, current cache hierarchies become one of the limiting factors for the scalability of applications utilizing multi-core processors. LÄS MER

  5. 4. Software Distributed Shared Memory Using the VIPS Coherence Protocol

    Master-uppsats, Uppsala universitet/Institutionen för informationsteknologi

    Författare :Magnus Norgren; [2015]
    Nyckelord :;

    Sammanfattning : A coherent global address space in a distributed system enables shared memory programming in a much larger scale than in a single multicore processor. The solution is to implement a software distributed shared memory (SWDSM) system since hardware support at this scale is non-existent. LÄS MER

  7. 5. Performance evaluation and analysis of Barrelfish using Simics

    Kandidat-uppsats, KTH/Skolan för informations- och kommunikationsteknik (ICT)

    Författare :Mateusz Olczak; [2013]
    Nyckelord :;

    Sammanfattning : Personal computing hardware is becoming ever more complex with more cores being added. It is moving from being a multi-core to a many-core system. In the next ten years we are expected to see hundreds of cores on one single chip. It is also very likely we will see more specialized hardware in coexistence with general purpose processing units. LÄS MER