Sökning: "High Level Synthesis"

Visar resultat 1 - 5 av 68 uppsatser innehållade orden High Level Synthesis.

  1. 1. Efficient Homomorphic Encryption using FPGA-Acceleration

    Kandidat-uppsats, Göteborgs universitet/Institutionen för data- och informationsteknik

    Nyckelord :fully homomorphic encryption; fpga acceleration; software hardware codesign;

    Sammanfattning : The data being handled by many applications is in most cases confidential. Furthermore,the applications handling such data are nowadays often offloaded to remotedata centers in the cloud. Computation on data in this environment is not securesince data is only encrypted when stored, and not while it is operated on. LÄS MER

  2. 2. Customized Processor Design for 5G Data Link Layer Processing

    Master-uppsats, Lunds universitet/Institutionen för elektro- och informationsteknik

    Författare :Patric Wargéus; Lukas Forsberg; [2020]
    Nyckelord :Technology and Engineering;

    Sammanfattning : This thesis aims to explore the workflow related to designing an application specific instruction-set processor (ASIP). An ASIP is a processor similar to a hardware accelerator (HAC) in terms of performance and efficiency, but containing elements of general purpose processors (GPPs) when it comes to programmability and flexibility. LÄS MER

  3. 3. Evaluation of high-level synthesis tools for generation of Verilog code from MATLAB based environments

    Uppsats för yrkesexamina på avancerad nivå, Luleå tekniska universitet/Institutionen för system- och rymdteknik

    Författare :Carl Bäck; [2020]
    Nyckelord :HLS; System Generator for DSP; Histogram; Xilinx Zynq UltraScale ; FPGA design workflow; Hardware Description Language Coder; HDL Coder; Field Programmable Gate Arrays; Image processing;

    Sammanfattning : FPGAs are of interest in the signal processing domain as they provide the opportunity to run algorithms at very high speed. One possible use case is to sort incoming data in a measurement system, using e.g. a histogram method. LÄS MER

  4. 4. Global clock distribution in the SiLago platform

    Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Författare :Jordi Altayó; [2020]
    Nyckelord :;

    Sammanfattning : The extreme evolution of Very Large Scale Integration (VLSI) design has followed Moore’s law for the past decades, which predicts a doubling of the number of transistors that can be implemented on a chip every 18 months. However, tightly coupled with the evolution of the technology capabilities, the complexity during the implementation of such designs has also increased dramatically. LÄS MER

  5. 5. Reciprocal sound transformations for computer supported collaborative jamming

    Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Författare :Roosa Kallionpää; [2020]
    Nyckelord :Computer Supported Collaborative Work; Jamming; Layered Mapping; Open Sound Control; Spectromorphology; Internet of Musical Things.;

    Sammanfattning : Collaborative jamming with digital musical instruments (DMI) exposes a need for output synchronization. While temporal solutions have been established, a better understanding of how live sound transformations could be balanced across instruments is required. LÄS MER