Sökning: "Kintex"

Hittade 5 uppsatser innehållade ordet Kintex.

  1. 1. A 1.8 ps Time-to-Digital Converter (TDC) Implemented in a 20 nm Field-Programmable Gate Array (FPGA) Using a Ones-Counter Encoding Scheme with Embedded Bin-Width Calibrations and Temperature Correction

    Master-uppsats, Linköpings universitet/Datorteknik

    Författare :Engström Sven; [2020]
    Nyckelord :time-to-digital; time-to-digital converter; TDC; 1.8 ps; field-programmable gate array; FPGA; 20 nm; Xilinx; Kintex; UltraScale; tapped delay line; TDL; taps; carry-chain; ones-counter; bit-counter; bubbles; wave-union; embedded; temperature correction;

    Sammanfattning : This thesis investigates the use of field-programmable gate arrays (FPGAs) to implement a time-to-digital converter (TDC) with on-chip calibration and temperature correction.Using carry-chains on the Xilinx Kintex UltraScale architecture to create a tapped delay line (TDL) has previously been proven to give good time resolution. LÄS MER

  3. 2. Next Generation SDN Switches Using Programming Protocol-Independent Packet Processors

    Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Författare :Tijo Varghese Thazhone; [2018]
    Nyckelord :;

    Sammanfattning : Over recent years, Software Defined Networking has enabled operators to control the network and realize new networking topologies. With increasing network traffic and protocol formats that aim at managing the traffic efficiently, the capabilities offered by Software Defined Networking alone are currently limited by the underlying fixed hardware infrastructure. LÄS MER

  4. 3. FPGA-Accelerated Image Processing Using High Level Synthesis with OpenCL

    Master-uppsats, Linköpings universitet/Datorteknik

    Författare :Johan Isaksson; [2017]
    Nyckelord :OpenCL; FPGA; CLAHE. RDC;

    Sammanfattning : High Level Synthesis (HLS) is a new method for developing applications for use on FPGAs. Instead of the classic approach using a Hardware Descriptive Language (HDL), a high level programming language can be used. HLS has many perks, including high level debugging and simulation of the system being developed. LÄS MER

  5. 4. FPGA-BASED HYBRID COMPUTING FOR ESS LINAC SIMULATOR.

    Master-uppsats, Lunds universitet/Institutionen för elektro- och informationsteknik

    Författare :Arun Jeevaraj; [2017]
    Nyckelord :Hybrid Computing; OpenCL; FPGA; Linear Accelerator; Heterogeneous computing; Technology and Engineering;

    Sammanfattning : The thesis explores efficient implementation strategies for the European Spallation Source (ESS) linear accelerator simulator. The target simulator needs to run at real time, requires high computation accuracy, and should be scalable for high density beam scenarios. LÄS MER

  7. 5. High Speed IO using Xilinx Aurora

    Master-uppsats, Institutionen för systemteknik; Tekniska högskolan

    Författare :Jeremia Nyman; [2013]
    Nyckelord :FPGA; Xilinx Aurora; HSIO; High Speed; Serial communication;

    Sammanfattning : A VHDL evaluation platform and interface to the Xilinx Aurora 8b/10b IP has been designed, tested and evaluated. The evaluation platform takes an arbitrary amount of data sources and sends the data over 1,2,4 or 8 multi gigabit serial lanes, using the Aurora 8b/10b protocol. LÄS MER