Sökning: "Network-on-Chip"

Visar resultat 1 - 5 av 33 uppsatser innehållade ordet Network-on-Chip.

  1. 1. The Global Interconnection Scheme of Silago : RTL Design and Verification

    Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Författare :Tong Lou; [2023]
    Nyckelord :Silago; global interconnection; synchronous dataflow; network on chip; Silago; global sammankoppling; synkront dataflöde; nätverk på chip;

    Sammanfattning : The Silago concept introduces a hardware-centric platform that is based on coarse-grained reconfigurable fabrics and networks on chips(NoCs). With the intra-region and inter-region NoC, the Silago platform can form resource clusters to host various applications. LÄS MER

  3. 2. Mapping DNNs onto the NoC Platform

    Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Författare :Hanbo Xu; [2022]
    Nyckelord :;

    Sammanfattning : This thesis uses an existing NoC simulation platform to construct a Network on Chip-based many-core system. The network is an 8_8 mesh topology. This thesis chooses LeNet5, ResNet, VGGNet, and AlexNet as the computing load, and tries to obtain a deep neural network mapping algorithm based on a NoC design method that can be widely used. LÄS MER

  4. 3. NoC for Versatile Micro-Code Programmable Multi-Core Processor Targeting Convolutional Neural Networks

    Master-uppsats, Linköpings universitet/Datorteknik

    Författare :Mattias Evaldsson; [2021]
    Nyckelord :;

    Sammanfattning : This thesis investigates building a network-on-chip for a multi-core chip computing convolutional neural networks (CNNs) using Imsys processors in a tree architecture. The division of work on a multi-core chip is investigated. LÄS MER

  5. 4. A Specification for Time-Predictable Communication on TDM-based MPSoC Platforms

    Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Författare :Kelun Liu; [2021]
    Nyckelord :Communication; Time-Predictability; Network-on-Chip; Software Specification; Worst-Case Communication Time; Kommunikation; Tid Förutsägbarhet; Nätverk-på-Chip; MjukvaruSpecifikation; Kommunikationstid i Värsta Fall;

    Sammanfattning : Formal System Design (ForSyDe) aims to bring the design of multiprocessor systems-on-chip (MPSoCs) to a higher level of abstraction and bridge the abstraction gap by transformational design refinement. The current research is focused on a correct-by-construction design flow, which requires design space exploration including formal models of computation and timepredictable platforms. LÄS MER

  7. 5. Global clock distribution in the SiLago platform

    Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Författare :Jordi Altayó; [2020]
    Nyckelord :;

    Sammanfattning : The extreme evolution of Very Large Scale Integration (VLSI) design has followed Moore’s law for the past decades, which predicts a doubling of the number of transistors that can be implemented on a chip every 18 months. However, tightly coupled with the evolution of the technology capabilities, the complexity during the implementation of such designs has also increased dramatically. LÄS MER