Sökning: "PECVD"
Visar resultat 1 - 5 av 11 uppsatser innehållade ordet PECVD.
1. BCP Lithography Defined Arrays of InAs NWs Grown Using MOVPE with Au Seeds
Master-uppsats, Lunds universitet/Lunds Tekniska Högskola; Lunds universitet/Fasta tillståndets fysikSammanfattning : In this report we outline a detailed process flow for a quick and inexpensive implementation of large dense arrays of InAs nanowires (NWs) grown in the reactive ion etching/etched (RIE) pores of a SiO2/SiNx mask on top of an InAs/Si(111) substrate. The self-assembled (hexagonally close-packed) pattern of poly(methyl-methacrylate) (PMMA) cylinders in a poly(styrene) (PS) matrix adopted by a linear diblock poly(styrene-block-methyl-methacrylate) P(S-b-MMA) block-copolymer (BCP) was transferred to the dielectric stack (consisting of a ≈10 nm plasma enhanced chemical vapour deposition/deposited (PECVD) SiNX layer topped by a thin atomic layer deposition/deposited (ALD) SiO2 film) using a two-step RIE procedure. LÄS MER
2. Electrically Modified Quartz Crystal Microbalance to Study Surface Chemistry Using Plasma Electrons as Reducing Agents
Master-uppsats, Linköpings universitet/KemiSammanfattning : Metallic films are important in various applications, such as electric devices where it can act as contacts. In electrical devices, the substrate typically consists of silicon dioxide (SiO2) which is a temperature-sensitive substrate. LÄS MER
3. Fabrication and Characterization of 4H-SiC MOS Capacitors with Different Dielectric Layer Treatments
Master-uppsats, Linköpings universitet/HalvledarmaterialSammanfattning : 4H-SiC based Metal-Oxide Semiconductor(MOS) capacitors are promising key components for next generation power devices. For high frequency power applications, however, there is a major drawback of this type of devices, i.e. LÄS MER
4. GaSb nanowire transistors with process induced strain
Master-uppsats, Lunds universitet/Fysiska institutionen; Lunds universitet/FörbränningsfysikSammanfattning : With the constant downscaling of Si transistors reaching its limits, other alternatives have been actively researched the past decades. Group III-V semiconductors are excellent materials with generally high carrier mobilities that can replace Si in transistors. LÄS MER
5. Evaluation of Chemical Mechanical Planarization Capability of Titan™ Wafer Carrier on Silicon Oxide
Master-uppsats, KTH/Skolan för informations- och kommunikationsteknik (ICT)Sammanfattning : Chemical mechanical polishing (CMP) has emerged as a critical technique for the manufacture of complex integrated circuits to achieve low surface roughness and high degree of planarization. In particular, the continuous progression of the wafer carrier has been driven by the interest of diminishing the waste on a wafer by reducing the edge of exclusion area, and hence, increasing the amount of chips per wafer. LÄS MER