Sökning: "RTL power estimation"

Hittade 3 uppsatser innehållade orden RTL power estimation.

1. 1. RTL power estimation and optimization flow for 5G radio products

   Master-uppsats, Lunds universitet/Institutionen för elektro- och informationsteknik

   Författare :Divya Khanna; Yu Zhu; [2021]
   Nyckelord :Power estimation; RTL; gate-level; Power Optimisation; Technology and Engineering;

   Sammanfattning : Power reduction is becoming a critical design requirement for ASIC/SOC designers. Reducing both dynamic and leakage power is essential to meet power budgets for portable devices as well as to ensure that these ASICs meet their packaging and cooling costs. LÄS MER

3. 2. Power-Aware Software Development For EMCA DSP

   Master-uppsats, KTH/Skolan för informations- och kommunikationsteknik (ICT)

   Författare :Meishenglan Zhang; [2017]
   Nyckelord :;

   Sammanfattning : The advent of FinFET technology necessitates a shift towards early dynamic power awareness, not only for ASIC block designers but also for software engineers that develop code for those blocks. CMOS dynamic power is typically reduced by optimizing the RTL models in terms of switching activity and clock gating efficiency. LÄS MER

4. 3. Mixed RTL and gate-level power estimation with low power design iteration

   Uppsats för yrkesexamina på grundnivå, Institutionen för systemteknik

   Författare :Jesper Nilsson; [2003]
   Nyckelord :Datorteknik; power estimation; RTL power estimation; gate-level power estimation; low power design iteration; Cadence PKS; Mentor Graphics Modelsim; Datorteknik;

   Sammanfattning : In the last three decades we have witnessed a remarkable development in the area of integrated circuits. From small logic devices containing some hundred transistors to modern processors containing several tens of million transistors. LÄS MER