Sökning: "Time to Digital Converter TDC"

Visar resultat 1 - 5 av 10 uppsatser innehållade orden Time to Digital Converter TDC.

1. 1. A Digital Phase-Locked Loop for Frequency Synthesis using an Adaptive Pulse Shrinking TDC

   Master-uppsats, Lunds universitet/Institutionen för elektro- och informationsteknik

   Författare :Viktor Lewin; [2023]
   Nyckelord :Phase-locked loop; PLL; DPLL; Frequency Synthesis; TDC; PFD; Technology and Engineering;

   Sammanfattning : This thesis investigates a new type of Phase-Locked Loop (PLL) architecture which combines a phase/frequency detector (PFD) and a digital loop filter. The quantization is done by a time-to-digital converter which continuously shrinks the pulse coming from the PFD and registers how far it propagates. LÄS MER

3. 2. A digital integer-N PLL architecture using a pulse-shrinking TDC for mmWave applications.

   Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Författare :Simon Richter; [2023]
   Nyckelord :Phase-locked-loops; All-digital Phase-locked-loops; Time-to-digital converters; 5G and beyond; Radio-frequency design; Fas-låsd-loop; Helt-digital fas-låst-loop; Tid-till-digital-omvandlare; 5G och framtiden; Radio-frekvens design;

   Sammanfattning : With the move of the broadband cellular network towards 5G taking off and the preparatory work on 6G and beyond starting, the need for low-complexity, low-power, and high-performance frequency synthesis using Phase-Locked Loop (PLL)s increases. As we get deeper into the mm-wave frequencies and push towards frequencies in the order of 50-70 GHz design challenges with existing PLL architectures, such as limited technology scaling and limited in-band noise performance become more apparent. LÄS MER

4. 3. A 1.8 ps Time-to-Digital Converter (TDC) Implemented in a 20 nm Field-Programmable Gate Array (FPGA) Using a Ones-Counter Encoding Scheme with Embedded Bin-Width Calibrations and Temperature Correction

   Master-uppsats, Linköpings universitet/Datorteknik

   Författare :Engström Sven; [2020]
   Nyckelord :time-to-digital; time-to-digital converter; TDC; 1.8 ps; field-programmable gate array; FPGA; 20 nm; Xilinx; Kintex; UltraScale; tapped delay line; TDL; taps; carry-chain; ones-counter; bit-counter; bubbles; wave-union; embedded; temperature correction;

   Sammanfattning : This thesis investigates the use of field-programmable gate arrays (FPGAs) to implement a time-to-digital converter (TDC) with on-chip calibration and temperature correction.Using carry-chains on the Xilinx Kintex UltraScale architecture to create a tapped delay line (TDL) has previously been proven to give good time resolution. LÄS MER

5. 4. Modellering och analys av avståndsmätare baserad på Time-to-Digital Converter

   M1-uppsats, Karlstads universitet/Avdelningen för fysik och elektroteknik

   Författare :Johan Sundelin; [2019]
   Nyckelord :Time to digital converter; Time of flight; rangefinder; TDC; Avståndsmätare; Time to digital converter;

   Sammanfattning : This bachelor thesis has been performed at Saab Dynamics AB in Karlskoga, with the purpose to design simulation models and analyze the technology study for distance measurement based on Time Of Flight (TOF) -principle. The distance measurement is implemented by short laser pulses and Time-to-Digital Converter (TDC). LÄS MER

7. 5. Adaptive TDC : Implementation and Evaluation of an FPGA

   Kandidat-uppsats, Linköpings universitet/Datorteknik

   Författare :Simon Andersson Holmström; [2015]
   Nyckelord :TDC; Carry-chain; FPGA; Zynq; Delay;

   Sammanfattning : Time to digital converter (TDC) is a digital unit that measures the time interval between two events.This is useful to determine the characteristics and patterns of a signal or an event. In this thesis ahybrid TDC is presented consisting of a tapped delay line and a clock counter principle. LÄS MER