Sökning: "VHDL"
Visar resultat 1 - 5 av 179 uppsatser innehållade ordet VHDL.
1. Program And Design Of A Pcb For A Traffic Controller : New hardware material for Halmstad University
Uppsats för yrkesexamina på grundnivå, Högskolan i Halmstad/Akademin för informationsteknologiSammanfattning : This thesis aims to develop hardware for laboratory in courses such asSwitching Theory at Halmstad University which can help students tounderstand practical applications of the hardware they are studying atuniversity. To achieve this, a printed circuit board (PCB) that simulates trafficintersections has been designed, constructed, and tested. LÄS MER
2. Difference Between Memory-based Storage and Register-based Storage on FPGAs
Master-uppsats, Linköpings universitet/Institutionen för systemteknikSammanfattning : Memory-based storage and register-based storage are commonly used storagetypes in fpgas. This thesis aims to build up the architecture of memory-basedstorage and register-based storage, implement the corresponding methods, compare the difference between them and determine which kind of storage workswell under different circumstances. LÄS MER
3. FPGA programming with VHDL : A laboratory for the students in the Switching Theory and Digital Design course
Kandidat-uppsats, Högskolan i HalmstadSammanfattning : This thesis aims to create effective and comprehensive learning materials for students enrolled in the Switching Theory and Digital Design course. The lab is designed to enable students to program an FPGA using VHDL in the Quartus programming environment to control traffic intersections with sensors and traffic signals. LÄS MER
4. Code Synthesis for Heterogeneous Platforms
Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)Sammanfattning : Heterogeneous platforms, systems with both general-purpose processors and task-specific hardware, are largely used in industry to increase efficiency, but the heterogeneity also increases the difficulty of design and verification. We often need to wait for the completion of all the modules to know whether the functionality of the design is correct or not, which can cause costly and tedious design iteration cycles. LÄS MER
5. Novel Method of ASIC interface IP development using HLS
Master-uppsats, Lunds universitet/Institutionen för elektro- och informationsteknikSammanfattning : High-Level Synthesis(HLS) is a design methodology that enables designers to implement hardware from high-level coding languages, such as C, C++, or System C. It provides designers with the ability to convey their design at a higher level of abstraction, which allows more emphasis on an algorithm and functional aspects of design instead on low-level hardware details. LÄS MER