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1. Implementation of Hierarchical Temporal Memory on a Many-core Architecture
Master-uppsats, Högskolan i Halmstad/Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE)Sammanfattning : This thesis makes use of a many-core architecture developed by the Adapteva Company toimplement a parallel version of the Hierarchical Temporal Memory Cortical LearningAlgorithm (HTM CLA). The HTM algorithm is a new machine learning model which ispromising in the aspect of pattern recognition and inference. LÄS MER
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