Sökning: "cache hierarchy"

Visar resultat 1 - 5 av 8 uppsatser innehållade orden cache hierarchy.

1. 1. Cache behaviour analysis for graph algorithms

   Kandidat-uppsats, Uppsala universitet/Institutionen för informationsteknologi

   Författare :Johan Söderström; [2023]
   Nyckelord :;

   Sammanfattning : Graph processing is an ever-increasing significant area of research in the wake of the demand for efficient tools that process data such as graphs, which can describe sets of objects (vertices) and their relations to each other (edges). Graph algorithms traverse these graphs by visiting their vertices or additionally calculating some properties about them such as how significant a specific vertex is in the context of the greater graph. LÄS MER

3. 2. Network Implementation with TCP Protocol : A server on FPGA handling multiple connections

   Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Författare :Ruobing Li; [2022]
   Nyckelord :CPU Offloading; Ethernet; FPGA; TCP IP; Verilog; Xilinx 7 Series; CPU Avlastning; Ethernet; FPGA; TCP IP; Verilog; Xilinx 7 Series;

   Sammanfattning : The growing number of players in Massively Multiplayer Online games puts a heavy load on the network infrastructure and the general-purpose CPU of the game servers. A game server’s network stack processing needs equal treatment to the game-related processing ability. LÄS MER

4. 3. Emerging Non-Volatile Memory and Initial Experiences with PCM Main Memory

   Magister-uppsats, Uppsala universitet/Institutionen för informationsteknologi

   Författare :Axel Grönberg; [2020]
   Nyckelord :;

   Sammanfattning : A group of new non-volatile memory technologies with characteristics making them worthy of consideration for different parts of the memory hierarchy, including the main memory, are emerging. In this thesis I discuss the state of STT-RAM, ReRAM and PCM technologies which are three of the front runners in this group of new technologies. LÄS MER

5. 4. Efficient Cache Randomization for Security

   Master-uppsats, Uppsala universitet/Institutionen för informationsteknologi

   Författare :Vasileios Loukas; [2019]
   Nyckelord :;

   Sammanfattning : The effectiveness of cache hierarchies, undeniably, is of crucial importance, since they essentially constitute the solution to the disparity between fast processors and high memory latency. Nevertheless, security developments spanning for more than the last decade, critically expose cache hierarchies' vulnerabilities, thus creating a need for counter-measures to take place. LÄS MER

7. 5. Modeling Region Granularity of the D2M Memory SystemPin Tool driven test for the Split CacheHierarchy

   Master-uppsats, Uppsala universitet/Institutionen för informationsteknologi

   Författare :Johan Snider; [2018]
   Nyckelord :;

   Sammanfattning : Cache simulation is a potentially complex and time consuming task in the field of computer architecture. Often, only parts of a program are simulated due to practical time constraints. This thesis proposes a way to simulate entire benchmark programs using the Intel Pin platform (PIN) for research into the Directto-Master memory system (D2M). LÄS MER