Sökning: "fpga C C"

Visar resultat 1 - 5 av 46 uppsatser innehållade orden fpga C C.

  1. 1. Modeling, Simulation, and Injection of Camera Images/Video to Automotive Embedded ECU : Image Injection Solution for Hardware-in-the-Loop Testing

    Uppsats för yrkesexamina på avancerad nivå, Uppsala universitet/Signaler och system

    Författare :Anton Lind; [2023]
    Nyckelord :ADAS; AD; ADS; HIL; Hardware in the loop; Hardware-in-the-loop; ECU; VCU; Automotive; Embedded; System; Systems; Camera; Image; Video; Injection; FPGA; MPSoC; Vivado; Vitis; VHDL; Volvo; Cars; FMC; HPC; LPC; MIPI CSI2; GMSL2; AMBA AXI4; Xilinx; RTL; Implementation; Synthesis; Intelectual Property; IP; Vehicle computing unit; Electronic control unit; TEB0911; TEF0007; TEF0010; CSI2 Tx; CSI2 Tx Subsystem; Zynq; SerDes; AXI4; AXI4-Lite; Programmable Logic; PL; Processor System; PS; C; C ; Video test pattern generator; VTPG; Axi traffic generator; ATG; Ultrascale ; Virtual input output; VIO; Integrated logic analyzer; ILA; Interface Unit;

    Sammanfattning : Testing, verification and validation of sensors, components and systems is vital in the early-stage development of new cars with computer-in-the-car architecture. This can be done with the help of the existing technique, hardware-in-the-loop (HIL) testing which, in the close loop testing case, consists of four main parts: Real-Time Simulation Platform, Sensor Simulation PC, Interface Unit (IU), and unit under test which is, for instance, a Vehicle Computing Unit (VCU). LÄS MER

  2. 2. Low-power Acceleration of Convolutional Neural Networks using Near Memory Computing on a RISC-V SoC

    Master-uppsats, Lunds universitet/Institutionen för elektro- och informationsteknik

    Författare :Kristoffer Westring; Linus Svensson; [2023]
    Nyckelord :FPGA; ASIC; Near Memory Computing; RISC-V; Convolutional Neural Network; Technology and Engineering;

    Sammanfattning : The recent peak in interest for artificial intelligence, partly fueled by language models such as ChatGPT, is pushing the demand for machine learning and data processing in everyday applications, such as self-driving cars, where low latency is crucial and typically achieved through edge computing. The vast amount of data processing required intensifies the existing performance bottleneck of the data movement. LÄS MER

  3. 3. Benchmarking linear-algebra algorithms on CPU- and FPGA-based platforms

    Kandidat-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Författare :Omar Askar Vergara; Karl Törnblom Bartholf; [2023]
    Nyckelord :FPGA; OpenCL; PolyBench; Cholesky; Durbin;

    Sammanfattning : Moore’s law is the main driving factor behind the rapid evolution of computers that has been observed in the past 50 years. Though the law is soon ending due to heat- and sizing-related issues. One solution to continuing the evolution is utilizing alternative computer hardware, where parallel hardware is especially interesting. LÄS MER

  4. 4. Evaluation of FPGA-based High Performance Computing Platforms

    Master-uppsats, Linköpings universitet/Datorteknik

    Författare :Martin Frick-Lundgren; [2023]
    Nyckelord :FPGA; High performance computing; BUDE; GEMM; CPU; GPU;

    Sammanfattning : High performance computing is a topic that has risen to the top in the era ofdigitalization, AI and automation. Therefore, the search for more cost and timeeffective ways to implement HPC work is always a subject extensively researched.One part of this is to have hardware that is capable to improve on these criteria. LÄS MER

  5. 5. High Level Synthesis for ASIC and FPGA

    Master-uppsats, Lunds universitet/Institutionen för elektro- och informationsteknik

    Författare :Malin Heyden; [2023]
    Nyckelord :HLS; high level synthesis; asic; fpga; catapult; filter; sfir; Technology and Engineering;

    Sammanfattning : This thesis aims to evaluate the performance of Siemens’ High Level Synthesis (HLS) tool Catapult. HLS can be considered the next step up in abstraction level from writing traditional Register Transfer Level (RTL) code which is time consuming and error prone. LÄS MER