Sökning: "memory access conflict"
Hittade 5 uppsatser innehållade orden memory access conflict.
1. How software prefetching affects transactional memory applications with high commit ratio
Kandidat-uppsats, Uppsala universitet/Institutionen för informationsteknologiSammanfattning : Transactional Memory is a concurrency control model that allows programmers to write code that access shared data consistently by marking sequential multi-operation regions as atomic transactions. While transactions make programming easier, the lack of progress guarantees as well as the cost of re-executing a conflicting transaction leaves room for improvement. LÄS MER
2. Minimising Memory Access Conflicts for FFT on a DSP
Master-uppsats, Linköpings universitet/DatorteknikSammanfattning : The FFT support in an Ericsson's proprietary DSP is to be improved in order to achieve high performance without disrupting the current DSP architecture too much. The FFT:s and inverse FFT:s in question should support FFT sizes ranging from 12-2048, where the size is a multiple of prime factors 2, 3 and 5. LÄS MER
3. Load Balancing of Parallel Tasks using Memory Bandwidth Restrictions
Kandidat-uppsats, Mälardalens högskola/Akademin för innovation, design och teknikSammanfattning : Shared resource contention is a significant problem in multi-core systems and can have a negative impact on the system. Memory contention occurs when the different cores in a processor access the same memory resource, resulting in a conflict. LÄS MER
4. Efficient Cache Randomization for Security
Master-uppsats, Uppsala universitet/Institutionen för informationsteknologiSammanfattning : The effectiveness of cache hierarchies, undeniably, is of crucial importance, since they essentially constitute the solution to the disparity between fast processors and high memory latency. Nevertheless, security developments spanning for more than the last decade, critically expose cache hierarchies' vulnerabilities, thus creating a need for counter-measures to take place. LÄS MER
5. Automatic Parallel Memory Address Generation for Parallel DSP Computing
Uppsats för yrkesexamina på avancerad nivå, Institutionen för systemteknikSammanfattning : The concept of Parallel Vector (scratch pad) Memories (PVM) was introduced as one solution for Parallel Computing in DSP, which can provides parallel memory addressing efficiently with minimum latency. The parallel programming more efficient by using the parallel addressing generator for parallel vector memory (PVM) proposed in this thesis. LÄS MER
