Sökning: "tapped delay line"

Hittade 4 uppsatser innehållade orden tapped delay line.

  1. 1. Improvement of the robustness and performance of time of arrival algorithms

    Uppsats för yrkesexamina på avancerad nivå, Uppsala universitet/Signaler och system

    Författare :Kristian Huotila; [2021]
    Nyckelord :;

    Sammanfattning : 5G offers several new improvements compared to its predecessors, such as higher speeds, lower latency and larger capacity. In order to ensure this, time of arrival algorithms are used in the Radio Access Networks for several purposes. Some of them are 3D positioning of User Equipment and synchronization. LÄS MER

  3. 2. A 1.8 ps Time-to-Digital Converter (TDC) Implemented in a 20 nm Field-Programmable Gate Array (FPGA) Using a Ones-Counter Encoding Scheme with Embedded Bin-Width Calibrations and Temperature Correction

    Master-uppsats, Linköpings universitet/Datorteknik

    Författare :Engström Sven; [2020]
    Nyckelord :time-to-digital; time-to-digital converter; TDC; 1.8 ps; field-programmable gate array; FPGA; 20 nm; Xilinx; Kintex; UltraScale; tapped delay line; TDL; taps; carry-chain; ones-counter; bit-counter; bubbles; wave-union; embedded; temperature correction;

    Sammanfattning : This thesis investigates the use of field-programmable gate arrays (FPGAs) to implement a time-to-digital converter (TDC) with on-chip calibration and temperature correction.Using carry-chains on the Xilinx Kintex UltraScale architecture to create a tapped delay line (TDL) has previously been proven to give good time resolution. LÄS MER

  4. 3. Adaptive TDC : Implementation and Evaluation of an FPGA

    Kandidat-uppsats, Linköpings universitet/Datorteknik

    Författare :Simon Andersson Holmström; [2015]
    Nyckelord :TDC; Carry-chain; FPGA; Zynq; Delay;

    Sammanfattning : Time to digital converter (TDC) is a digital unit that measures the time interval between two events.This is useful to determine the characteristics and patterns of a signal or an event. In this thesis ahybrid TDC is presented consisting of a tapped delay line and a clock counter principle. LÄS MER

  5. 4. Direct Digital Pulse Width Modulation for Class D Amplifiers

    Magister-uppsats, Institutionen för systemteknik

    Författare :Stefan Stark; [2007]
    Nyckelord :PWM; Class-D; delay-line; direct digital modulation; delay element;

    Sammanfattning : Class D amplifiers are becoming increasingly popular in audio devices. The strongest reason is the high efficiency which makes it advantageous for portable battery-driven products. Infineon Technologies is developing products in this area, and has recently filed a patent application regarding an implementation of a part of the class D amplifier. LÄS MER