A Benchmark and Evaluation of Imperas OVPSim Virtual Platform Tool Using RISC-V Processors

Sammanfattning: In recent years, there has been a rapid development of embedded processors. These processors are designed for domains like aerospace, automotive, automation, healthcare, and more. However, both hardware and software must be validated before the actual application. Manufacturing a processor requires extremely high cost and a long time to finish. A platform simulator is a good solution for testing specific hardware architectures and software applications before the actual processor system is available. This thesis presents an evaluation of the Open Virtual Platforms (OVP) using benchmarks designed for Reduced Instruction Set Computer Five (RISCV) embedded processors. The RISC-V architecture is selected because it is the only open instruction set. OVPsim can simulate the embedded software on a simulated personal-built embedded platform. A benchmark set containing 10 benchmarks is provided in this thesis, covering different applications to give a comprehensive reflection of performance. The results of the benchmark set could be used in comparison with other simulators or test data from actual platform demos to achieve a better understanding of performance.