Ethernet DMA Datapath Performance Optimization for 5G Radios

Sammanfattning: Direct Memory Access (DMA) is a feature of computer systems that allows hardware subsystems to access the main memory of the system independent of the Central Processing Unit (CPU). With the rise of big data transfers from/to different I/O devices, the use of DMA controllers has increased significantly. The work of DMA is not limited to only offloading processor data transfer tasks, but it can transfer data at much higher rates than processor reads and writes. ScatterGather DMA further enhances this technique by providing data transfers from one non-contiguous block of memory to another by means of a series of smaller contiguous-block transfers unlike normal DMA. This thesis project explores Ericsson’s Ethernet DMA, which is used in the 5G radios for high speed Ethernet data transfer. The ASIC hardware design was synthesized and programmed on Intel’s Agilex development board. A test case has been written to measure the performance of Ethernet DMA’s datapath. The test case was run first to check the functionality of the design in a loop-back scenario. A packet generator module was integrated to generate ethernet packets in the Ethernet DMA and the packets were sent through the datapath to be written to the memory. Besides, ethernet packets were read from the memory and transmitted from memory-mapped to streaming path. The performance of Ethernet DMA datapath was measured for both streaming to memory-mapped and memory-mapped to streaming paths. To get more reliable results, performance was measured directly from the design hardware using oscilloscope. The obtained results are analyzed and some suggestions are proposed to optimize the performance of Ethernet DMA.