Thermal simulations and design guidelines on multi-finger PAs based on 28nm FD-SOI technology

Detta är en Master-uppsats från KTH/Skolan för informations- och kommunikationsteknik (ICT)

Författare: Matteo Maria Vignetti; [2013]

Nyckelord: ;

Sammanfattning: The electrical performance of Silicon-On-Insulator (SOI) devices can be dramatically enhanced in terms of reduced parasitic capacitances, leakage current and power consumption. On the other hand, self-heating effects (SHE) are more pronounced than in a bulk device because of the buried oxide which limits power dissipation through the substrate. This issue is particularly important in the design of power amplifiers (PAs) for mobile applications where excellent RF performance is required while at the same time the current carrying capability of the devices have to be very high. In the present work the thermal behavior of multi-finger FDSOI-MOSFET power amplifiers has been investigated and thermal design guidelines have been proposed. Nano-scale thermal conduction and heat generation in nano-devices have been preliminarily studied in order to account for nano-scale effects. A finite element analysis model (FEA model) has been realized in the COMSOL multi-physics environment. Thermal simulations have been performed and the thermal behaviour of the simulated devices with respect to geometrical parameters has been studied. Based on the simulation results, thermal design guidelines have been proposed and a PA unit cell design has been presented. LVT device having a pitch p = 130nm has found to be the best choice for the design of a multifinger MOSFET power amplifier and it has been adopted as the core for the design of a unit cell. Such a unit cell has been used for the design of a power amplifier to be manufactured in the first tape-out for the Dynamic-ULP project.

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