Sökning: "Dynamic Partial Reconfiguration"

Visar resultat 1 - 5 av 7 uppsatser innehållade orden Dynamic Partial Reconfiguration.

1. 1. Deep Learning Model Deployment for Spaceborne Reconfigurable Hardware : A flexible acceleration approach

   Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Författare :Javier Ferre Martin; [2023]
   Nyckelord :Space Situational Awareness; Deep Learning; Convolutional Neural Networks; FieldProgrammable Gate Arrays; System-On-Chip; Computer Vision; Dynamic Partial Reconfiguration; High-Level Synthesis; Rymdsituationstänksamhet; Djupinlärning; Konvolutionsnätverk; Omkonfigurerbara Field-Programmable Gate Arrays FPGAs ; System-On-Chip SoC ; Datorseende; Dynamisk partiell omkonfigurering; Högnivåsyntes.;

   Sammanfattning : Space debris and space situational awareness (SSA) have become growing concerns for national security and the sustainability of space operations, where timely detection and tracking of space objects is critical in preventing collision events. Traditional computer-vision algorithms have been used extensively to solve detection and tracking problems in flight, but recently deep learning approaches have seen widespread adoption in non-space related applications for their high accuracy. LÄS MER

3. 2. Evaluation of partial reconfiguration in FPGA-based high-performance videosystems

   Uppsats för yrkesexamina på grundnivå, Akademin för innovation, design och teknik

   Författare :Segerblad Emil; [2013]
   Nyckelord :;

   Sammanfattning : The use of recongurable logic within the eld of computing has increased during the las tdecades. The ability to change hardware during the design process enables developers to lower the time to market and to reuse designs in several different products. LÄS MER

4. 3. Hardware implementation of a Partial Dynamic Reconfiguration Controller

   Master-uppsats, Institutionen för datavetenskap; Tekniska högskolan

   Författare :Anup Kini; [2013]
   Nyckelord :;

   Sammanfattning : Partial Dynamic Reconfiguration (PDR) of Field Programmable Gate Arrays (FPGAs) wasintroduced to overcome the need for more resources on the FPGA fabric. This enabled parts of thedevice to be reconfigured at runtime, while the rest of the system continued to function without anyinterruptions. LÄS MER

5. 4. Dessign and Implementation of Hardened Reconfiguration Controller for Self-Healing Systems on SRAM-Based FPGAs

   Master-uppsats, KTH/Skolan för informations- och kommunikationsteknik (ICT)

   Författare :NASER DERAKHSHAN; [2013]
   Nyckelord :;

   Sammanfattning : As digital systems become large and complex, their dependability is getting more important, particularly in mission-critical and safety‐critical applications. Among various available platforms for implementing a digital system, SRAM-based Field Programmable Gate Arrays (FPGAs) are increasingly adopted in embedded systems due to their flexibility in achieving multiple requirements such as low cost, high performance, and fast turnaround time compared to Fixed Application Specific Integrated Circuits (ASICs). LÄS MER

7. 5. Design and Verification of SOPC FDP2009 and Research of Reconfigurable Applications

   Master-uppsats, KTH/Skolan för informations- och kommunikationsteknik (ICT)

   Författare :Fanjiong Zhang; [2011]
   Nyckelord :Dynamic reconfiguration; partial reconfiguration; configurable computing; image noise reduction algorithm;

   Sammanfattning : In recent years, reconfigurable devices are developing fast because of its flexibility and less development cost. But intrinsic shortcomings of reconfigurable devices, for example, high power, low speed, etc. induce difficulties in complex designs realizations. LÄS MER