Sökning: "AXI4"

Hittade 5 uppsatser innehållade ordet AXI4.

  1. 1. Modeling, Simulation, and Injection of Camera Images/Video to Automotive Embedded ECU : Image Injection Solution for Hardware-in-the-Loop Testing

    Uppsats för yrkesexamina på avancerad nivå, Uppsala universitet/Signaler och system

    Författare :Anton Lind; [2023]
    Nyckelord :ADAS; AD; ADS; HIL; Hardware in the loop; Hardware-in-the-loop; ECU; VCU; Automotive; Embedded; System; Systems; Camera; Image; Video; Injection; FPGA; MPSoC; Vivado; Vitis; VHDL; Volvo; Cars; FMC; HPC; LPC; MIPI CSI2; GMSL2; AMBA AXI4; Xilinx; RTL; Implementation; Synthesis; Intelectual Property; IP; Vehicle computing unit; Electronic control unit; TEB0911; TEF0007; TEF0010; CSI2 Tx; CSI2 Tx Subsystem; Zynq; SerDes; AXI4; AXI4-Lite; Programmable Logic; PL; Processor System; PS; C; C ; Video test pattern generator; VTPG; Axi traffic generator; ATG; Ultrascale ; Virtual input output; VIO; Integrated logic analyzer; ILA; Interface Unit;

    Sammanfattning : Testing, verification and validation of sensors, components and systems is vital in the early-stage development of new cars with computer-in-the-car architecture. This can be done with the help of the existing technique, hardware-in-the-loop (HIL) testing which, in the close loop testing case, consists of four main parts: Real-Time Simulation Platform, Sensor Simulation PC, Interface Unit (IU), and unit under test which is, for instance, a Vehicle Computing Unit (VCU). LÄS MER

  3. 2. AXI-PACK : Near-memory Bus Packing for Bandwidth-Efficient Irregular Workloads

    Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Författare :Chi Zhang; [2022]
    Nyckelord :General propose processor; on-chip bus protocol; irregular memory access; ASIC digital circuit design.; Generellt förslag på processor; on-chip-bussprotokoll; oregelbunden minnesåtkomst; digital ASIC-kretsdesign.;

    Sammanfattning : General propose processor (GPP) are demanded high performance in dataintensive applications, such as deep learning, high performance computation (HPC), where algorithm kernels like GEMM (general matrix-matrix multiply) and SPMV (sparse matrix-vector multiply) kernels are intensively used. The performance of these data-intensive applications are bounded with memory bandwidth, which is limited by computing & memory access coupling and memory wall effect. LÄS MER

  4. 3. A Camera System for the KTH MIST Satellite

    Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Författare :Volkan Coskun; [2020]
    Nyckelord :;

    Sammanfattning : The KTH MIST satellite will include a Camera System that should capture pictures of Earth from Space. Due to low Bandwidth, the satellite can traverse several lapses around the Earth until the picture is transmitted down to Earth. The picture is processed and the raw pixels stored in an on-board DRAM. LÄS MER

  5. 4. Bus System for Coresonic SIMT DSP

    Master-uppsats, Linköpings universitet/Datorteknik

    Författare :Gustav Svensk; [2016]
    Nyckelord :On Chip Communication; Bus system; AXI4;

    Sammanfattning : This thesis consists of designing and implementing a bus system for a specific computersystem for MediaTek Sweden AB . The focus of the report is to show the considerations andchoices made in the design of a suitable bus system. Implementation details describe howthe system is constructed. LÄS MER

  7. 5. SYSTEM ON CHIP : Fördelar i konstruktion med system on chip i förhållande till fristående FPGA och processor

    Kandidat-uppsats, Högskolan i Jönköping/JTH, Data- och elektroteknik

    Författare :Jan Ljungberg; [2015]
    Nyckelord :ARM Cortex A9; AXI3; AXI4; AXI4-Lite; Chipscope; FPGA; GP buss; interconnect; internbuss; kostnader; Modelsim; processor; System on Chip SoC ; Vivado; Xilinx; Zynq-7000;

    Sammanfattning : In this exam project the investigation has been done to determine, which profits that can be made by switching an internal bus between two chips, one FPGA and a processor, to an internal bus implemented on only one chip, System on Chip. The work is based on measurements made in real time in Xilinx’s development tools on different buses, AXI4 and AXI4-Light connected to AXI3. LÄS MER