Current-Mode Class D Power Amplifier for 2.4GHz Wi-Fi

Sammanfattning: Modern wireless communication techniques employed in the Wi-Fi® protocol, such as orthogonal frequency-division multiplexing exhibit analogue signals with high peak-to-average power ratio. Therefore, power amplifiers for Wi-Fi suffer from low efficiency when operating in back-off mode, away from their maximum efficiency at peak power. In recent years, digital power amplifiers have been developed to replace their analogue equivalent, taking advantage of easier scaling and circumventing transition frequency issues. Since the digital power amplifier technology for Wi-Fi application is recent, it has not yet replaced robust analogue amplifiers in industrial context. This work proposes to investigate the feasibility and complexity to replace an analogue amplifier with its digital counterpart, with at least the same specification. Among several possible architectures, the reverse class D is chosen for its apparent simplicity. It achieves low power loss into transistors parasitics by operating in square-current mode instead of voltage mode, hence displaying a current-based RF-DAC behaviour. After elaborating the core design with simple efficiency enhancement techniques specific to reverse class D, the layout of the circuitry has been designed. Post-layout simulations have shown the reverse class D digital amplifier designed in CMOS 22nm achieves the required specification of 18dBm average output power with -28dB error vector magnitude in the 2.4GHz range. This basic architecture achieves 19% average drain efficiency, a small improvement over its analogue equivalent currently in use.