Embedded Software Simulation Method for Multi-Core Environments Using Parallelism

Detta är en Master-uppsats från KTH/Skolan för elektroteknik och datavetenskap (EECS)

Sammanfattning: As technology advances, embedded systems become increasingly complex, with embedded software implemented on platforms with many processors running in parallel. Testing such software on hardware might not always be possible and, when possible, can be time-consuming and costly. An alternative to using real hardware is to use simulation methods instead. This thesis project explores one approach using multiple parallel Linux processes and barrier synchronization for simulating embedded software. An implementation consisting of a simulation engine and multiple simulated cores was designed. This implementation is evaluated for accuracy and speed by comparing it to another barrier synchronization tool that does not use parallelism. The results indicate that the sequential tool has an accuracy error that is doubled for every added simulated core. However, the parallel simulator can handle these situations without any accuracy error increase. Regarding speed, the parallel implementation is approximately 30% slower for longer simulations. However, simulation speed could be increased by utilizing some unused potential in the parallelism.

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