Sökning: "Implementation on Chip"
Visar resultat 6 - 10 av 168 uppsatser innehållade orden Implementation on Chip.
6. Design of a Differential Cross-Coupled Power LC Oscillator with ASK Modulation
Master-uppsats, Linköpings universitet/Elektroniska Kretsar och SystemSammanfattning : Rapid growth in the field of communications industry has led to newer opportunities and challenges in the design of CMOS based monolithic integrated circuits. ASK modulators are a class of digital modulators which are known for their relative simplicity of implementation for low cost applications in the industrial and biomedical domains. LÄS MER
7. FPGA Accelerated Digital Image Correlation For Clamping Force Measurement
Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)Sammanfattning : Digital image correlation is a contactless optical method used for displacement and strain measurement which has become increasingly popular in the field of experimental mechanics. A specialized use case for the algorithm is to measure the clamping force in bolted joints, a crucial metric when considering the longevity and reliability of the constructs. LÄS MER
8. High Level Synthesis for ASIC and FPGA
Master-uppsats, Lunds universitet/Institutionen för elektro- och informationsteknikSammanfattning : This thesis aims to evaluate the performance of Siemens’ High Level Synthesis (HLS) tool Catapult. HLS can be considered the next step up in abstraction level from writing traditional Register Transfer Level (RTL) code which is time consuming and error prone. LÄS MER
9. Implementation of Bolt Detection and Visual-Inertial Localization Algorithm for Tightening Tool on SoC FPGA
Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)Sammanfattning : With the emergence of Industry 4.0, there is a pronounced emphasis on the necessity for enhanced flexibility in assembly processes. In the domain of bolt-tightening, this transition is evident. Tools are now required to navigate a variety of bolts and unpredictable tightening methodologies. LÄS MER
10. Acoarse grain reconfigurable memory architecture for linear algebra and deep neural networks
Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)Sammanfattning : Companies and institutions around the world have been working to develop machines with always more computing power. This race has now found its new objective: hexascale computing (with 1018 flops machines). LÄS MER