Sökning: "Network on Chip NoC"
Visar resultat 1 - 5 av 30 uppsatser innehållade orden Network on Chip NoC.
1. The Global Interconnection Scheme of Silago : RTL Design and Verification
Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)Sammanfattning : The Silago concept introduces a hardware-centric platform that is based on coarse-grained reconfigurable fabrics and networks on chips(NoCs). With the intra-region and inter-region NoC, the Silago platform can form resource clusters to host various applications. LÄS MER
2. Mapping DNNs onto the NoC Platform
Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)Sammanfattning : This thesis uses an existing NoC simulation platform to construct a Network on Chip-based many-core system. The network is an 8_8 mesh topology. This thesis chooses LeNet5, ResNet, VGGNet, and AlexNet as the computing load, and tries to obtain a deep neural network mapping algorithm based on a NoC design method that can be widely used. LÄS MER
3. Simulation and Comparative Analysis of NoC Routers and TileLink as Interconnects for OpenPiton
Master-uppsats, Uppsala universitet/Institutionen för informationsteknologiSammanfattning : In recent years, the world has moved towards multicore processing architecture to meet the ever growing need for high performance computing.The Industry using its industrial knowledge and resources have been building larger, more complex, manycore processors. LÄS MER
4. Design of the SiLago GNOC
Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)Sammanfattning : Synchoros VLSI design style can be an alternative choice to fit the increasing complexity of embedded multi-processor architectures. SiLago Block is part of the synchoros blocks, which can effectively reduce the cost of logic and physical synthesis as it is hardened and highly centralized details from each layer of metal. LÄS MER
5. NoC for Versatile Micro-Code Programmable Multi-Core Processor Targeting Convolutional Neural Networks
Master-uppsats, Linköpings universitet/DatorteknikSammanfattning : This thesis investigates building a network-on-chip for a multi-core chip computing convolutional neural networks (CNNs) using Imsys processors in a tree architecture. The division of work on a multi-core chip is investigated. LÄS MER