Assertion Based Verification on Senior DSP

Sammanfattning: Digital designs are often very large and complex, this makes locating and fixing a bug very hard and time consuming. Often more than half of the development time is spent on verification. Assertion based verification is a method that uses assertions that can help to improve the verification time. Simulating with assertions provides more information that can be used to locate and correct a bug. In this master thesis assertions are discussed and implemented in Senior DSP processor.