Sökning: "Router Performance"
Visar resultat 16 - 20 av 46 uppsatser innehållade orden Router Performance.
16. Efficient IPv6 Neighbor Discovery in Wireless Environment
Master-uppsats, Lunds universitet/Institutionen för elektro- och informationsteknikSammanfattning : As the address space of IPv4 is being depleted with the development of IoT (Internet Of Things), there is an increasing need for permanent transition to the IPv6 protocol as soon as possible. Nowadays, many 3GPP (3rd Generation Partnership Project) Networks have implemented or will implement IPv6 in the near future for Internet access. LÄS MER
17. Software Defined Networking : Virtual Router Performance
Kandidat-uppsats, Högskolan i Skövde/Institutionen för informationsteknologiSammanfattning : Virtualization is becoming more and more popular since the hardware that is available today often has theability to run more than just a single machine. The hardware is too powerful in relation to the requirementsof the software that is supposed to run on the hardware, making it inefficient to run too little software ontoo powerful of machines. LÄS MER
18. Performance comparison of IPv4 and IPv6 in open source router distributions
Kandidat-uppsats, Högskolan i Skövde/Institutionen för informationsteknologiSammanfattning : With IPv4 addresses running out there is a need for IPv6 compatible routers. This study aims to find open source routers that have support for IPv6 and compare it in terms of performance to IPv4 to see if there are any differences in performance. LÄS MER
19. Wireless Protected Setup (WPS) : Prestandajämförelse mellan Reaver och Bully
Kandidat-uppsats, Högskolan i Skövde/Institutionen för kommunikation och informationSammanfattning : Wireless Protected Setup (WPS) är ett säkerhetsprotokoll för trådlösa nätverk. Dess design medför en allvarlig säkerhetsbrist som kan möjliggöra att obehöriga kan få åtkomst till ett lösenordskyddat trådlöst nätverk. Vid attack finns det olika verktyg tillgängliga att använda. LÄS MER
20. Short Message Network-On-Chip Interconnect for ASIC
Master-uppsats, KTH/Skolan för informations- och kommunikationsteknik (ICT)Sammanfattning : The rise of large scale integration has resulted in large number of processing elements/cores on a single ASIC. Thus an efficient interconnect scheme between the different processing elements and interfaces is required. Bus based interconnect poses problems such as non-scalability. LÄS MER