Develop a Graphical User Interface for the assembler for SiLago Platform

Sammanfattning: Vesyla-II is developed as the High-Level Synthesis (HLS) tool serving the SiLago platform. The assembler Manas is a part of the Coarse Grain Reconfigurable Architectures (CGRA) compiler in Vesyla-II, which is used to transform the information from source code into the target language. A group of graphical Intermediate Representatives (IRs) associated with the instruction set of Dynamically Reconfigurable Resource Array (DRRA) plays an important role in this transformation. Manual effort is required to optimize the result of transformation by configuring the DRRA instructions and organizing the relationship among them. In this thesis project, we provide a graphical user interface ManasUI to assist Vesyla-II developers in graphically operating the transformation. We follow the normal procedure of software development and start by working out the requirements of ManasUI based on the background knowledge of the graphical IRs applied in Vesyla-II. Then we design and implement the prototype of ManasUI based on the solution of the web application. ManasUI takes the DRRA instruction set or one of the IRs — Hierarchical Multi-Thread Dependency Graph (HMTDG) as input and graphically represents the concepts of node, hierarchy, and dependency relationship in HMTDG. The canvas component in ManasUI provides a handy interface for users to interact with the graph of HMTDG directly. The functionality, scalability, and portability of ManasUI are verified by conducting a group of test cases. The test cases are designed aiming to cover all user scenarios. From the results of testing, the prototype of ManasUI meets all the requirements that we have identified.