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  1. 1. FPGA Implementation of Flexible Interpolators and Decimators

    Master-uppsats, Elektroniksystem; Tekniska högskolan

    Författare :Dabbugottu VenkataVikram; [2013]
    Nyckelord :Interpolation; Decimation; Linear-phase FIR interpolation; VHDL implementation of interpolators and decimators;

    Sammanfattning : The aim of this thesis is to implement flexible interpolators and decimators onField Programmable Gate Array (FPGA). Interpolators and decimators of differentwordlengths (WL) are implemented in VHDL. The Farrow structure is usedfor the realization of the polyphase components of the interpolation/decimationfilters. LÄS MER