A Specification for Time-Predictable Communication on TDM-based MPSoC Platforms

Detta är en Master-uppsats från KTH/Skolan för elektroteknik och datavetenskap (EECS)

Sammanfattning: Formal System Design (ForSyDe) aims to bring the design of multiprocessor systems-on-chip (MPSoCs) to a higher level of abstraction and bridge the abstraction gap by transformational design refinement. The current research is focused on a correct-by-construction design flow, which requires design space exploration including formal models of computation and timepredictable platforms. The latter is widely used for hard real-time systems. In order to make a platform time-predictable, all components, as well as inter-core communication, need to have the worst-case execution time (WCET) estimations and be easily analyzed. Time-division multiplexing (TDM) networks can precisely allocate network resources at each time point and further provide time-predictable guarantees. However, the application developer must take the time to understand the hardware and capabilities of a network-on-chip (NoC) in order to communicate between the cores. Moreover, a wide variety of communication libraries belonging to different platforms increase the learning cost. The Message Passing Interface (MPI) standard inspires this project. For time-predictable communication on TDM-based MPSoCs, a specification with communication primitives should also be necessary for either system designers or application developers. Compared with the MPI standard, this specification should be lighter because it only elaborates on timepredictable communication. Besides, platforms it applies to are limited to real-time NoCs using TDM, which the worst-case communication time (WCCT) could be calculated at an early stage of the design. In this project, we abstracted from concurrency and communication libraries of existing platforms and derived communication primitives to this specification. Two different communication modes, push-based and interactive, are summarized. Push-based communication composes of checking the direct memory access (DMA) status, pushing the message, and checking the receiving buffer. Interactive communication comprises sending, receiving, and acknowledging primitives, which are divided into blocking and non-blocking. In addition, this specification permits the user to calculate WCCT of transmitting a message from one processor to another if one knows the size of messages transmitted and hardware configuration by addingWCET of all communication operations running on a single processor and latency of the communication connection together. The calculation process is shown using an existing platform. 

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