Sökning: "System-on-Chip SoC testing"

Visar resultat 6 - 10 av 11 uppsatser innehållade orden System-on-Chip SoC testing.

  1. 6. DESIGN AND PROTOTYPE OF RESOURCE NETWORK INTERFACES FOR NETWORK ON CHIP

    Master-uppsats, JTH, Data- och elektroteknik

    Författare :Adnan Mahmood; Zaheer Ahmed Mohammed; [2009]
    Nyckelord :Network on Chip NoC ; System on Chip SoC ; Resource Network Interface RNI ; Altera FPGA; Nios II Core; On Chip Communication; Distributed Routing; Source Routing;

    Sammanfattning : Network on Chip (NoC) has emerged as a competitive and efficient communication infrastructure for the core based design of System on Chip. Resource (core), router and interface between router and core are the three main parts of a NoC. Each core communicates with the network through the interface, also called Resource Network Interface (RNI). LÄS MER

  2. 7. Loss-less on-chip test response compression for diagnosis and debug in volume production of system-on-chip

    Kandidat-uppsats, Institutionen för datavetenskap

    Författare :Michael Söderman; [2008]
    Nyckelord :System-on-Chip SoC testing; test response compression; diagnosis; debug; trace buffer;

    Sammanfattning : The technical evolution during the past decade have escalated the use of electronic devices, which are more common today than ever before. The market is still growing rapidly and will continue to do so. The reason for this is the increased demand for devices with integrated circuits. LÄS MER

  3. 8. Komprimering av testdata för SOC : -En implementation av metoden vector repeat

    Uppsats för yrkesexamina på grundnivå, Institutionen för datavetenskap

    Författare :Katarina Larsson; [2007]
    Nyckelord :vector repeat; komprimering; test; SOC; vektorminne; sekvensminne;

    Sammanfattning : Sammanfattning: De ökande testdatavolymerna som krävs för att testa moderna System-On-Chip (SOC) bidrar i hög grad till den ökande produktionskostnaden. De stora testdatavolymerna kräver stora och dyra Automatic Test Equipment-minnen (ATE-minnen). För att minska behovet av dessa minnen så har olika komprimeringsmetoder utvecklats. LÄS MER

  4. 9. Functional Self-Test of DSP cores in a SOC

    Uppsats för yrkesexamina på grundnivå, KTH/Mikroelektronik och Informationsteknik, IMIT

    Författare :Sarmad Jamal Dahir; [2007]
    Nyckelord :functional testing; SOC; DSP; Self test; Embedded systems testing;

    Sammanfattning : The rapid progress made in integrating enormous numbers of transistors on a single chip is making it possible for hardware designers to implement more complex hardware architectures in their designs. Nowadays digital telecommunication systems are implementing several forms of SOC (System-On-Chip) structures. LÄS MER

  5. 10. Power Modeling and Scheduling of Tests for Core-based System Chips

    Uppsats för yrkesexamina på grundnivå, Institutionen för datavetenskap

    Författare :Soheil Samii; [2005]
    Nyckelord :Datorsystem; core; power; scan chain; scheduling; SOC; switching activity; System-on-Chip; test access mechanism; test pattern; wrapper; Datorsystem;

    Sammanfattning : The technology today makes it possible to integrate a complete system on a single chip, called "System-on-Chip'' (SOC). Nowadays SOC designers use previously designed hardware modules, called cores, together with their user defined logic (UDL), to form a complete system on a single chip. LÄS MER