Sökning: "hardware description language"

Visar resultat 6 - 10 av 56 uppsatser innehållade orden hardware description language.

  1. 6. Offloading Workloads from CPU of Multiplayer Game Server to FPGA : SmartNIC implementation with UDP Communication

    Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Författare :Junwen Bao; [2022]
    Nyckelord :FPGA; UDP; Multiple-connection Server; Network Communication; Integrated Circuit Design; FPGA; UDP; server med flera anslutningar; nätverkskommunikation; Integrerad kretsdesign;

    Sammanfattning : For multiplayer games, the performance of the server’s Central Processing Unit (CPU) is the main factor that limits the number of players on the server at the same time. Compared with the CPU, the Field-Programmable Gate Array (FPGA) architecture has no instructions set and no shared memory. LÄS MER

  3. 7. Wave Propagation Experiment on FPGA with Miniaturized Payload for Sounding Rocket Application

    Kandidat-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Författare :Leonardo Filippeschi; [2022]
    Nyckelord :Wave propagation experiment; REXUS BEXUS; FPGA; IQ demodulation; ADC; VHDL;

    Sammanfattning : This bachelor's thesis aims to implement a wave propagation experiment on Field-Programmable Gate Array to detect the signal strength at pre-defined frequencies for use in sounding rocket experiments. This includes the choice of suitable components such as analog to digital converters, filters, voltage regulators, and amplifiers. LÄS MER

  4. 8. Design space exploration using HLS in relation to code structuring

    Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Författare :Debraj Das; [2022]
    Nyckelord :Design Space Exploration DSE ; High level Synthesis HLS ; Design Methodology;

    Sammanfattning : High Level Synthesis (HLS) is a methodology to translate a model developed in a high abstraction layer, e.g. C/C++/SystemC, that describes the algorithm into a Register-Transfer level (RTL) description like Verilog or VHDL. LÄS MER

  5. 9. IP block signalbehandling

    Uppsats för yrkesexamina på grundnivå, Uppsala universitet/Institutionen för elektroteknik

    Författare :Holmlund Joakim; [2021]
    Nyckelord :CIC; Digitala filter; FIR; FPGA; IIR; Inbyggda system; IP block; Signalbehandling;

    Sammanfattning : The thesis aims to implement different digital filters such as finite impulse response (FIR), infinite impulse response (IIR) and cascade integrator comb (CIC) on the field-programmable gate array (FPGA) development board using hardware description language (VHDL). To this purpose, Intel’s systems integration tool Platform designer is used to convert the implementation to an IP core. LÄS MER

  7. 10. Automatic Generation of Real-Time Machine Learning Architectures

    Uppsats för yrkesexamina på avancerad nivå, Högskolan i Halmstad/Akademin för informationsteknologi

    Författare :Catharina Frindt Faundez; Sivan Dawood; [2021]
    Nyckelord :;

    Sammanfattning : An era is rising where more embedded systems are being moved to the edge. Everything from automated vehicles to smartphones with more complex machine learning architectures needs to be provided. Hence, the requirements of contributing with efficiency emerge more. LÄS MER