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1. 1. Design and Evaluation of A Low-Voltage, Process-Variation-Tolerant SRAM Cache in 90nm CMOS Technology

   Uppsats för yrkesexamina på avancerad nivå, Institutionen för systemteknik

   Författare :Ali Fazli Yeknami; [2008]
   Nyckelord :SRAM; traditional 6T; asymmetric 6T; memory; SNM; cell;

   Sammanfattning : This thesis presents a novel six-transistor SRAM intended for advanced microprocessor cache application. The objectives are to reduce power consumption through scaling the supply voltage and to design a SRAM that is fully process-variation-tolerant, utilizing separate read and write access ports as well as exploiting asymmetry. LÄS MER