Sökning: "HW SW partitioning"

Hittade 4 uppsatser innehållade orden HW SW partitioning.

  1. 1. Hardware Accelerator for Duo-binary CTC decoding : Algorithm Selection, HW/SW Partitioning and FPGA Implementation

    Uppsats för yrkesexamina på grundnivå, Institutionen för systemteknik

    Författare :Joakim Bjärmark; Marco Strandberg; [2006]
    Nyckelord :Error Correcting Codes; Turbo Codes; Decoding; Implementation; FPGA;

    Sammanfattning : Wireless communication is always struggling with errors in the transmission. The digital data received from the radio channel is often erroneous due to thermal noise and fading. The error rate can be lowered by using higher transmission power or by using an effective error correcting code. LÄS MER

  3. 2. Hardware / Software co-design for JPEG2000

    Uppsats för yrkesexamina på grundnivå, Institutionen för systemteknik

    Författare :Per Nilsson; [2006]
    Nyckelord :JPEG2000; Discrete Wavelet Transform; arithmetic coding; DSP processors; HW SW partitioning; ;

    Sammanfattning : For demanding applications, for example image or video processing, there may be computations that aren’t very suitable for digital signal processors. While a DSP processor is appropriate for some tasks, the instruction set could be extended in order to achieve higher performance for the tasks that such a processor normally isn’t actually design for. LÄS MER

  4. 3. Design of Single Scalar DSP based H.264/AVC Decoder

    Uppsats för yrkesexamina på grundnivå, Institutionen för systemteknik

    Författare :Di Wu Tiejun Hu; [2005]
    Nyckelord :Datorteknik; H.264; Decoder; DSP; Accelerator; HW SW partitioning; Datorteknik;

    Sammanfattning : H.264/AVC is a new video compression standard designed for future broadband network. Compared with former video coding standards such as MPEG-2 and MPEG-4 part 2, it saves up to 40% in bit rate and provides important characteristics such as error resilience, stream switching etc. LÄS MER

  5. 4. Parallel JPEG Processing with a Hardware Accelerated DSP Processor

    Uppsats för yrkesexamina på grundnivå, Institutionen för systemteknik

    Författare :Mikael Andersson; Per Karlström; [2004]
    Nyckelord :Datorteknik; JPEG; JFIF; 2-D DCT; Huffman; Accelerator; HW SW partitioning; Datorteknik;

    Sammanfattning : This thesis describes the design of fast JPEG processing accelerators for a DSP processor. Certain computation tasks are moved from the DSP processor to hardware accelerators. The accelerators are slave co processing machines and are controlled via a new instruction set. LÄS MER