Sökning: "LVS Layout Versus Schematic"
Hittade 2 uppsatser innehållade orden LVS Layout Versus Schematic.
1. Configurable, scalable single-ended sense amplifier with additional auxiliary blocks for low-power two-port memories in advanced FinFET technologies
Master-uppsats, Lunds universitet/Institutionen för elektro- och informationsteknikSammanfattning : System on Chip (SoC) designs contain a variety of Intellectual Property (IP) cores, including digital signal processing blocks, media and graphics processing units, as well as processing core units that employ multiple-port memories to enhance performance and bandwidth. These memories allow parallel read/write operations from the same memory blocks from different ports. LÄS MER
2. Implementation of a Zero Aware SRAM Cell for a Low Power RAM Generator
Uppsats för yrkesexamina på grundnivå, Institutionen för systemteknikSammanfattning : In this work, an existing generator for layout of Static Random Access Memory (SRAM) is improved. The tool is completed with a block decoder, which was missing when the thesis started. A feature of generating schematic files is also added. LÄS MER