Sökning: "Time to digital converter"
Visar resultat 1 - 5 av 44 uppsatser innehållade orden Time to digital converter.
1. A Digital Phase-Locked Loop for Frequency Synthesis using an Adaptive Pulse Shrinking TDC
Master-uppsats, Lunds universitet/Institutionen för elektro- och informationsteknikSammanfattning : This thesis investigates a new type of Phase-Locked Loop (PLL) architecture which combines a phase/frequency detector (PFD) and a digital loop filter. The quantization is done by a time-to-digital converter which continuously shrinks the pulse coming from the PFD and registers how far it propagates. LÄS MER
2. A digital integer-N PLL architecture using a pulse-shrinking TDC for mmWave applications.
Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)Sammanfattning : With the move of the broadband cellular network towards 5G taking off and the preparatory work on 6G and beyond starting, the need for low-complexity, low-power, and high-performance frequency synthesis using Phase-Locked Loop (PLL)s increases. As we get deeper into the mm-wave frequencies and push towards frequencies in the order of 50-70 GHz design challenges with existing PLL architectures, such as limited technology scaling and limited in-band noise performance become more apparent. LÄS MER
3. Antenna as a sensor for sensing available LTE networks
Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)Sammanfattning : This thesis primarily deals with the concept of designing an antenna based device to harvest energy from Radio Frequency (RF) and using the harvested energy to sense the available Long Term Evolution (LTE) network in order for the Internet of Things (IoT) devices to connect to the network for the purpose of transmitting and receiving data. Secondarily the importance of this project is targeting how to conserve battery power in an IoT device and extend it’s lifetime. LÄS MER
4. Methods of self-interference cancellation in full duplex telecommunication systems
Master-uppsats, Uppsala universitet/Institutionen för elektroteknikSammanfattning : With the wireless technology evolving quickly, so does the demand of speed and efficiency. This makes the companies look for new and better ways to improve the current systems. One way of improving the present systems would be to employ Full Duplex Technology. LÄS MER
5. A design of a 100 MS/s, 8-bit Pipelined ADC in CMOS
Master-uppsats, Lunds universitet/Institutionen för elektro- och informationsteknikSammanfattning : The thesis focuses on designing and simulating an 8-bit high-speed fully differential pipelined Analog to Digital Converter (ADC) in the 65nm Complementary Metal-Oxide-Semiconductor (CMOS) technology by using the software Cadence Virtuoso. The aim is to increase the operation speed of the ADC for communication systems without reducing the performance, in the meantime, the low power consumption and the low complexity should also be required when considering future implementation. LÄS MER
