Sökning: "12-bit"
Visar resultat 1 - 5 av 8 uppsatser innehållade ordet 12-bit.
1. Design of a 16 GSps RF Sampling Resistive DAC with on-chip Voltage Regulator
Master-uppsats, Linköpings universitet/Elektroniska Kretsar och SystemSammanfattning : Wireless communication technologies continue to evolve to meet the demand for increased data throughput. To achieve higher data throughput one approach is to increase the bandwidth. One problem related to very large bandwidths is the implementation of digital-to-analog converters with sampling rates roughly in the 5 to 20 GHz range. LÄS MER
2. Design of a 12-bit 200-MSps SAR Analog-to-Digital converter
Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)Sammanfattning : The Successive Approximation (SAR) Analog-to-Digital converter is one of the most energy-efficient A/D converter. In this thesis, the development of a SAR ADC in a 28-nm CMOS technology based on charge redistribution is presented. LÄS MER
3. Implementation of a 200 MSps 12-bit SAR ADC
Master-uppsats, Lunds universitet/Institutionen för elektro- och informationsteknikSammanfattning : Analog-to-digital converters (ADCs) with high conversion frequency, often based on pipelined architectures, are used for measuring instruments, wireless communication and video applications. Successive approximation register (SAR) converters offer a compact and power efficient alternative but the conversion speed is typically designed for lower frequencies. LÄS MER
4. A Cyclic Analog to Digital Converter for CMOS image sensors
Master-uppsats, Elektroniksystem; Tekniska högskolanSammanfattning : The constant strive for improvement of digital video capturing speeds together with power efficiency increase, has lead to tremendous research activities in the image sensor readout field during the past decade. The improvement of lithography and solid-state technologies provide the possibility of manufacturing higher resolution image sensors. LÄS MER
5. FPGA Implementation of Flexible Interpolators and Decimators
Master-uppsats, Elektroniksystem; Tekniska högskolanSammanfattning : The aim of this thesis is to implement flexible interpolators and decimators onField Programmable Gate Array (FPGA). Interpolators and decimators of differentwordlengths (WL) are implemented in VHDL. The Farrow structure is usedfor the realization of the polyphase components of the interpolation/decimationfilters. LÄS MER