Sökning: "logic gate"

Visar resultat 1 - 5 av 37 uppsatser innehållade orden logic gate.

1. 1. Deep Learning Model Deployment for Spaceborne Reconfigurable Hardware : A flexible acceleration approach

   Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Författare :Javier Ferre Martin; [2023]
   Nyckelord :Space Situational Awareness; Deep Learning; Convolutional Neural Networks; FieldProgrammable Gate Arrays; System-On-Chip; Computer Vision; Dynamic Partial Reconfiguration; High-Level Synthesis; Rymdsituationstänksamhet; Djupinlärning; Konvolutionsnätverk; Omkonfigurerbara Field-Programmable Gate Arrays FPGAs ; System-On-Chip SoC ; Datorseende; Dynamisk partiell omkonfigurering; Högnivåsyntes.;

   Sammanfattning : Space debris and space situational awareness (SSA) have become growing concerns for national security and the sustainability of space operations, where timely detection and tracking of space objects is critical in preventing collision events. Traditional computer-vision algorithms have been used extensively to solve detection and tracking problems in flight, but recently deep learning approaches have seen widespread adoption in non-space related applications for their high accuracy. LÄS MER

3. 2. FPGA programming with VHDL : A laboratory for the students in the Switching Theory and Digital Design course

   Kandidat-uppsats, Högskolan i Halmstad

   Författare :Samaneh Azimi; Safia Abba Ali; [2023]
   Nyckelord :FPGA Field-Programmable Gate Arrays VHDL Very High-Speed Integrated Circuits HDL Hardware description language LUT Look-up-table CLB Configurable Logic Blocks MUX Multiplexers IOB Input Output Blocks DUT Device under the test ASIC Application-specific integrated circuits SOC System on chips RTL Register Transfer Language;

   Sammanfattning : This thesis aims to create effective and comprehensive learning materials for students enrolled in the Switching Theory and Digital Design course. The lab is designed to enable students to program an FPGA using VHDL in the Quartus programming environment to control traffic intersections with sensors and traffic signals. LÄS MER

4. 3. Implementation of Bolt Detection and Visual-Inertial Localization Algorithm for Tightening Tool on SoC FPGA

   Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Författare :Muhammad Ihsan Al Hafiz; [2023]
   Nyckelord :Bolt detection; Visual-Inertial localization; System-on-Chip SoC ; Field-Programmable Gate Array FPGA ; Machine learning; Perspective-n-Points; Error-State Extended Kalman Filter ESEKF ; High-Level Synthesis HLS ; YOLO; Tightening tool; Bultdetektering; visuell-tröghetslokalisering; System-on-Chip SoC ; Field-Programmable Gate Array FPGA ; Machine Learning; Perspective-n-Points; Error-State Extended Kalman Filter ESEKF ; High-Level Synthesis HLS ; YOLO; åtdragningsverktyg;

   Sammanfattning : With the emergence of Industry 4.0, there is a pronounced emphasis on the necessity for enhanced flexibility in assembly processes. In the domain of bolt-tightening, this transition is evident. Tools are now required to navigate a variety of bolts and unpredictable tightening methodologies. LÄS MER

5. 4. FPGA accelerated packet capture with eBPF : Performance considerations of using SoC FPGA accelerators for packet capturing.

   Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Författare :Jakub Duchniewicz; [2022]
   Nyckelord :Field Programmable Gate Array; Acceleration; Networking; Embedded Linux; Field Programmable Gate Array; Field Programmable Gate Array; Acceleration; Nätverksarbete; Inbyggd Linux; sprzętowa akceleracja; sieci internetowe; wbudowany system Linux;

   Sammanfattning : With the rise of the Internet of Things and the proliferation of embedded devices equipped with an accelerator arose a need for efficient resource utilization. Hardware acceleration is a complex topic that requires specialized domain knowledge about the platform and different trade-offs that have to be made, especially in the area of power consumption. LÄS MER

7. 5. Closed-loop control and data- recording of a modular-multilevel converter (MMC)

   Master-uppsats, KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Författare :Longgang Su; [2022]
   Nyckelord :Modular multilevel converters MMCs ; filed programmable gate array FPGA ; direct memory access DMA ; energy closed-loop control; data recording; ethernet.; Modulära multilevel-omvandlare MMC ; filed programmeable gate array FPGA ; direkt minnesåtkomst DMA ; energistyrning med sluten slinga; datainspelning; ethernet.;

   Sammanfattning : Modular multilevel converters (MMCs) are the preferred converter solution in flexible ac transmission systems (FACTS) and high-voltage direct current (HVDC) applications. This is due to the high quality of the voltage and current signals, lower overall losses, and fewer problems with switching-related EMI. LÄS MER